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FEATURES
* * * * * * * * 500kHz SWITCHING FULL BRIDGE OUTPUT 5-40V (80V P-P) 5A OUTPUT 1 IN2 FOOTPRINT FAULT PROTECTION SHUTDOWN CONTROL SYNCHRONIZABLE CLOCK HERMETIC PACKAGE
APPLICATIONS
* HIGH FIDELITY AUDIO AMPLIFIER * BRUSH TYPE MOTOR CONTROL * VIBRATION CANCELLING AMPLIFIER
18-PIN DIP PACKAGE STYLE EL EXTERNAL CONNECTIONS

DESCRIPTION
The SA07 amplifier is a 40 volt, 500kHz PWM amplifier. The full bridge output circuit provides 5 amps of continuous drive current for applications as diverse as high fidelity audio and brush type motors. Clock output and input pins can be used for synchronization with other amplifiers or an externally generated clock. An integrator amplifier is provided. Direct access to the pwm input is provided for connection to digital motion control circuits. Protection circuits guard against thermal overloads as well as shorts to supply or ground. The current limit is programmable with one or two external resistors depending on the application. A shutdown input disables all output bridge drivers. The 18 pin steel package is hermetically sealed.
Case tied to Pin 7. Allow no current in case. Bypassing of supplies is required. If +PWM > RAMP then A OUT > B OUT.
BLOCK DIAGRAM AND TYPICAL APPLICATION CONNECTIONS HIGH FIDELITY AUDIO

APEX MICROTECHNOLOGY CORPORATION * TELEPHONE (520) 690-8600 * FAX (520) 888-3329 * ORDERS (520) 690-8601 * EMAIL prodlit@apexmicrotech.com
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SA07
ABSOLUTE MAXIMUM RATINGS
SUPPLY VOLTAGE, +VS to GND, 10mS surge SUPPLY VOLTAGE, VCC to GND OUTPUT CURRENT, peak POWER DISSIPATION, internal TEMPERATURE, pin solder - 10s TEMPERATURE, junction2 TEMPERATURE, storage OPERATING TEMPERATURE RANGE, case INPUTS TEST CONDITIONS2 MIN
ABSOLUTE MAXIMUM RATINGS SPECIFICATIONS
SPECIFICATIONS
PARAMETER ERROR AMP, CLOCK REF3 OFFSET VOLTAGE BIAS CURRENT OFFSET CURRENT COMMON MODE VOLTAGE RANGE COMMON MODE REJECTION, DC SLEW RATE OPEN LOOP GAIN GAIN BANDWIDTH PRODUCT CLOCK OUT CLOCK OUT, high level CLOCK OUT, low level 5V OUT OUTPUT EFFICIENCY, 5A output SWITCHING FREQUENCY CURRENT, continuous CURRENT, peak3 RDS(ON)3 POWER SUPPLY VOLTAGE, VCC VOLTAGE, VS CURRENT, VCC CURRENT, VS INPUTS3 ILIM/SHDN, trip point -PWM, +PWM, low level -PWM, +PWM, high level CLOCK IN, low level CLOCK IN, high level THERMAL4 RESISTANCE, junction to case RESISTANCE, junction to air TEMPERATURE RANGE, case
60V 16V 7.5A 80W1 300C 150C -65 to +150C -55 to +125C -.4/+5.4V TYP MAX 10 50 30 3 12 100 10 1 5 94 500 UNITS mV pA pA V dB V/S dB MHz MHz V V V % kHz A A V V mA mA mV V V V V C/W C/W C
0 70
LOAD 5mA VS = 40V 100 ms, 10% duty cycle
.98 4.7 0 4.988
1.02 5.3 .2 5.012
5 7 55
Full temperature range Full temperature range Switching Switching, No Load
10 5
12
16 40 50 90 110 .8 Vcc .3 5.6 3.5
90 0 2.7 0 3 Full temperature range Full temperature range Meets full range specifications
15 -25 85
NOTES: 1. 2. 3. 4.
40W in each of the two active output transistors on at any one time. Unless otherwise noted: TC = 25C. Min max values guaranteed but not tested. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to achieve high MTTF. For guidance, refer to the heatsink data sheet. The SA07 is constructed from MOSFET transistors. ESD handling procedures must be observed. The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or subject to temperatures in excess of 850C to avoid generating toxic fumes.
CAUTION
APEX MICROTECHNOLOGY CORPORATION * 5980 NORTH SHANNON ROAD * TUCSON, ARIZONA 85741 * USA * APPLICATIONS HOTLINE: 1 (800) 546-2739
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OPERATING CONSIDERATIONS
SA07

APEX MICROTECHNOLOGY CORPORATION * TELEPHONE (520) 690-8600 * FAX (520) 888-3329 * ORDERS (520) 690-8601 * EMAIL prodlit@apexmicrotech.com
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SA07

OPERATING CONSIDERATIONS
due to the very fast switching times and the inductance of the lead connection. The bypassing requirements of the Vcc supply are less stringent, but still necessary. A .1F to .47F ceramic capacitor connected directly to the Vcc pin will suffice.
NOISE FILTERING
Switching noise can enter the SA07 through the INT OUT to +PWM connection. A wise precaution is to low pass filter this connection. Adjust the pass band of the filter to 10 times the bandwidth required by the application. Keep the resistor value to 100 ohms or less since this resistor becomes part of the hysteresis circuit on the pwm comparator.
PCB LAYOUT
The designer needs to appreciate that the SA07 combines in one circuit both high speed high power switching and low level analog signals. Certain layout rules of thumb must be considered when a circuit board layout is designed using the SA07: 1. Bypassing of the power supplies is critical. Capacitors must be connected directly to the power supply pins with very short lead lengths (well under 1 inch). Ceramic chip capacitors are best. 2. Make all ground connections with a star pattern at pin 7. 3. Beware of capacitive coupling between output connections and signal inputs through the parasitic capacitance between layers in multilayer PCB designs. 4. Do not run small signal traces between the pins of the output section (pins 11-16). 5. Do not allow high currents to flow into the ground plane. 6. Separate switching and analog grounds and connect the two only at pin 7 as part of the star pattern.
GENERAL
Please read Application Note 30 on "PWM Basics". Refer to Application Note 1 "General Operating Considerations" for helpful information regarding power supplies, heat sinking and mounting. Visit www.apexmicrotech.com for design tools that help automate pwm filter design and heat sink selection. The "Application Notes" and "Technical Seminar" sections contain a wealth of information on specific types of applications. Information on package outlines, heat sinks, mounting hardware and other accessories are located in the "Packages and Accessories" section. Evaluation Kits are available for most Apex product models, consult the "Evaluation Kit" section for details. For the most current version of all Apex product data sheets, visit www.apexmicrotech.com.
CLOCK CIRCUIT AND RAMP GENERATOR
The clock frequency is internally set to a frequency of approximately 1MHZ. The CLK OUT pin will normally be tied to the CLK IN pin. The clock is divided by two and applied to an RC network which produces a ramp signal at the RAMP pin. An external clock signal can be applied to the CLK IN pin for synchronization purposes. If a clock frequency lower than 1MHz is chosen an external capacitor must be tied to the RAMP pin. This capacitor, which parallels an internal capacitor, must be selected so that the ramp oscillates 2.5 volts p-p with the lower peak 1.25 volts above ground.
INTEGRATOR
The integrator provides the inverted signal for negative feedback and also the open loop gain for the overall application circuit accuracy. Recommended value of CINT is 10 pF for stability. However, poles and zeroes can be added to the circuit for overall loop stability as required.
CURRENT LIMIT
There are two load current sensing pins, I SENSE A and I SENSE B. The two pins can be shorted in the voltage mode connection but both must be used in the current mode connection (see figures A and B). It is recommended that RLIMIT resistors be non-inductive. Load current flows in the I SENSE pins. To avoid errors due to lead lengths connect the I LIMIT/ SHDN pin directly to the RLIMIT resistors (through the filter network and shutdown divider resistor) and connect the RLIMIT resistors directly to the GND pin. Do not connect RLIMIT sense resistors to the ground plane.
BYPASSING
Adequate bypassing of the power supplies is required for proper operation. Failure to do so can cause erratic and low efficiency operation as well as excessive ringing at the outputs. The Vs supply should be bypassed with at least a 1F ceramic capacitor in parallel with another low ESR capacitor of at least 10F per amp of output current. Capacitor types rated for switching applications are the only types that should be considered. The bypass capacitors must be physically connected directly to the power supply pins. Even one inch of lead length will cause excessive ringing at the outputs. This is
APEX MICROTECHNOLOGY CORPORATION * 5980 NORTH SHANNON ROAD * TUCSON, ARIZONA 85741 * USA * APPLICATIONS HOTLINE: 1 (800) 546-2739
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OPERATING CONSIDERATIONS
SA07
SHUTDOWN
The shutdown circuitry makes use of the internal current limiting circuitry. The two functions may be externally combined in voltage and current modes as shown below in Figures A and B. The RLIMIT resistors will normally be very low values and can be considered zero for this application. In Figure A, RSHDN and 1K form a voltage divider for the shutdown signal. After a suitable noise filter is designed for the current limit, adjust the value of RSHDN to give a minimum 110 mV of shutdown signal at the I LIMIT/SHDN pin when the shutdown signal is high. Note that CFILTER will filter both the current limit noise spikes and the shutdown signal. Shutdown and current limit operate on each cycle of the internal switching rate. As long as the shutdown signal is high the output will be disabled.

PROTECTION CIRCUITS
Circuits monitor the temperature and load on each of the bridge output transistors. On each cycle should any fault condition be detected all output transistors in the bridge are shut off. Faults protected against are: shorts across the outputs, shorts to ground, and over temperature conditions. Should any of these faults be detected, the output transistors will be latched off.* In addition there is a built in dead time during which all the output transistors are off. The dead time removes the possibility of a momentary conduction path through the upper and lower transistors of each half bridge during the switching interval. Noise or flyback may be observed at the outputs during this time due to the high impedance of the outputs in the off state. This will vary with the nature of the load. * To restart the SA07 remove the fault and recycle VCC or, alternatively, toggle the ILIMIT/SHDN (PIN16) with a shut down pulse.

Switching noise spikes will invariably be found at the I SENSE pins. The noise spikes could trip the current limit threshold which is only 100 mV. RFILTER and CFILTER should be adjusted so as to reduce the switching noise well below 100 mV to prevent false current limiting. The sum of the DC level plus the noise peak will determine the current limiting value. As in most switching circuits it may be difficult to determine the true noise amplitude without careful attention to grounding of the oscilloscope probe. Use the shortest possible ground lead for the probe and connect exactly at the GND terminal of the amplifier. Suggested starting values are CFILTER = .001uF, RFILTER = 5k . The required value of RLIMIT in voltage mode may be calculated by: RLIMIT = .1 V / ILIMIT where RLIMIT is the required resistor value, and ILIMIT is the maximum desired current. In current mode the required value of each RLIMIT is 2 times this value since the sense voltage is divided down by 2 (see Figure B). If RSHDN is used it will further divide down the sense voltage. The shutdown divider network will also have an effect on the filtering circuit.
This data sheet has been carefully checked and is * TELEPHONE (520) 690-8600 * FAX is assumed for possible ORDERS (520) 690-8601 * EMAIL prodlit@apexmicrotech.com APEX MICROTECHNOLOGY CORPORATIONbelieved to be reliable, however, no responsibility(520) 888-3329 * inaccuracies or omissions. All specifications are subject to change without notice. SA07U REV. B DECEMBER 1998 (c) 1998 Apex Microtechnology Corp.
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